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IETE Activities
UTS has made an affiliation with IETE (Institution of Electronics and telecommunication engineers) Warangal sub centre for participating in research and projects in VLSI and Embedded systems areas.

As part of it UTS and IETE shares their technical expertise, infrastructure and man power in conducting various education activities. In a press release the Managing director of UTS Mr. K. Srinivas, and IETE Warangal Secretary Mr. Krishna Reddy, explained that the main focus would be given to the following activities.

Educational projects B.tech/B.E, M.tech/M.E level
1 day or 2 days Seminars
Conferences, symposiums
Major (few weeks) workshops for faculty

The following technology areas are identified as per the academic and industrial requirements.
  • CMOS cell design, schematic & layout based design.
  • CMOS Sub micron design issues
  • VLSI EDA tools - techniques, industrial exposure
  • VLSI structures for high speed arithmetic and memory cells
  • Semi custom VLSI front end RTL design with VHDL and verilog
  • Xilinx FPGA based design
  • FPGAs for ASIC prototyping and algorithm modeling
  • Embedded system design with FPGAs
  • Xilinx EDA tools
  • Advanced microcontroller based design
  • ARM7 & ARM9 based design
  • GNU compiler tool chain
Support in Graduate and Undergraduate Project works
Including several invited talks and guest lectures two major seminars were conducted at Warangal.



For more details contact